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  1. Article ; Online: DC and AC characteristics of Si/SiGe based vertically stacked complementary-tunneling FETs.

    Thoti, Narasimhulu / Li, Yiming

    Nanotechnology

    2023  Volume 34, Issue 50

    Abstract: In this paper, electrical characteristics of a complementary tunneling field effect transistor (CTFET) is studied computationally for the first time. The design of CTFET is carried with 3D vertically stacked channels (multiple) ... ...

    Abstract In this paper, electrical characteristics of a complementary tunneling field effect transistor (CTFET) is studied computationally for the first time. The design of CTFET is carried with 3D vertically stacked channels (multiple) of
    Language English
    Publishing date 2023-10-11
    Publishing country England
    Document type Journal Article
    ZDB-ID 1362365-5
    ISSN 1361-6528 ; 0957-4484
    ISSN (online) 1361-6528
    ISSN 0957-4484
    DOI 10.1088/1361-6528/acfb11
    Database MEDical Literature Analysis and Retrieval System OnLINE

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  2. Article: Design of GAA Nanosheet Ferroelectric Area Tunneling FET and Its Significance with DC/RF Characteristics Including Linearity Analyses.

    Thoti, Narasimhulu / Li, Yiming

    Nanoscale research letters

    2022  Volume 17, Issue 1, Page(s) 53

    Abstract: This work reports an emerging structure of gate-all-around ferroelectric area tunneling field-effect transistor (FATFET) by considering ferroelectric and a n-epitaxial layer enveloped around the overlapped region of the source and channel to succeed with ...

    Abstract This work reports an emerging structure of gate-all-around ferroelectric area tunneling field-effect transistor (FATFET) by considering ferroelectric and a n-epitaxial layer enveloped around the overlapped region of the source and channel to succeed with complete area of tunneling probability. To accomplish this, ferroelectric ([Formula: see text]) is exploited and modeled to boost the FATFET performance through internal-voltage ([Formula: see text]) amplification. The corresponding modeling approach to estimate the ferroelectric parameters along with [Formula: see text] calculations of the metal-ferroelectric-insulator (MFIS) option through capacitance equivalent method is addressed. Using these options the proposed device outperforms effectively in delivering superior DC and RF performance among possible options of the [Formula: see text] ferroelectric TFETs. The significance of proposed design is examined with recently reported ferroelectric TFETs. Our results show 10-time advancement on the [Formula: see text], reduced steep or average subthreshold swing (< 25 mV/dec), frequencies higher than 150 GHz, and insignificant to linearity deviations at low bias points. Furthermore, 2-order reduction in energy efficiency is succeeded with the proposed design environment.
    Language English
    Publishing date 2022-05-12
    Publishing country United States
    Document type Journal Article
    ZDB-ID 2253244-4
    ISSN 1556-276X ; 1931-7573
    ISSN (online) 1556-276X
    ISSN 1931-7573
    DOI 10.1186/s11671-022-03690-8
    Database MEDical Literature Analysis and Retrieval System OnLINE

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  3. Article ; Online: Gate-all-around nanowire vertical tunneling FETs by ferroelectric internal voltage amplification.

    Thoti, Narasimhulu / Li, Yiming

    Nanotechnology

    2021  Volume 33, Issue 5

    Abstract: This work illustrates the most effective way of utilizing the ferroelectricity for tunneling field-effect transistors (TFETs). The ferroelectric ( ... ...

    Abstract This work illustrates the most effective way of utilizing the ferroelectricity for tunneling field-effect transistors (TFETs). The ferroelectric (Hf
    Language English
    Publishing date 2021-11-12
    Publishing country England
    Document type Journal Article
    ZDB-ID 1362365-5
    ISSN 1361-6528 ; 0957-4484
    ISSN (online) 1361-6528
    ISSN 0957-4484
    DOI 10.1088/1361-6528/ac2e26
    Database MEDical Literature Analysis and Retrieval System OnLINE

    More links

    Kategorien

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