LIVIVO - The Search Portal for Life Sciences

zur deutschen Oberfläche wechseln
Advanced search

Your last searches

  1. AU="Hsu, Hung-Hsi"
  2. AU="Antúnez‐Montes, Omar Yassef"

Search results

Result 1 - 2 of total 2

Search options

  1. Article ; Online: Fusion of memristor and digital compute-in-memory processing for energy-efficient edge computing.

    Wen, Tai-Hao / Hung, Je-Min / Huang, Wei-Hsing / Jhang, Chuan-Jia / Lo, Yun-Chen / Hsu, Hung-Hsi / Ke, Zhao-En / Chen, Yu-Chiao / Chin, Yu-Hsiang / Su, Chin-I / Khwa, Win-San / Lo, Chung-Chuan / Liu, Ren-Shuo / Hsieh, Chih-Cheng / Tang, Kea-Tiong / Ho, Mon-Shu / Chou, Chung-Cheng / Chih, Yu-Der / Chang, Tsung-Yung Jonathan /
    Chang, Meng-Fan

    Science (New York, N.Y.)

    2024  Volume 384, Issue 6693, Page(s) 325–332

    Abstract: Artificial intelligence (AI) edge devices prefer employing high-capacity nonvolatile compute-in-memory (CIM) to achieve high energy efficiency and rapid wakeup-to-response with sufficient accuracy. Most previous works are based on either memristor-based ... ...

    Abstract Artificial intelligence (AI) edge devices prefer employing high-capacity nonvolatile compute-in-memory (CIM) to achieve high energy efficiency and rapid wakeup-to-response with sufficient accuracy. Most previous works are based on either memristor-based CIMs, which suffer from accuracy loss and do not support training as a result of limited endurance, or digital static random-access memory (SRAM)-based CIMs, which suffer from large area requirements and volatile storage. We report an AI edge processor that uses a memristor-SRAM CIM-fusion scheme to simultaneously exploit the high accuracy of the digital SRAM CIM and the high energy-efficiency and storage density of the resistive random-access memory memristor CIM. This also enables adaptive local training to accommodate personalized characterization and user environment. The fusion processor achieved high CIM capacity, short wakeup-to-response latency (392 microseconds), high peak energy efficiency (77.64 teraoperations per second per watt), and robust accuracy (<0.5% accuracy loss). This work demonstrates that memristor technology has moved beyond in-lab development stages and now has manufacturability for AI edge processors.
    Language English
    Publishing date 2024-04-18
    Publishing country United States
    Document type Journal Article
    ZDB-ID 128410-1
    ISSN 1095-9203 ; 0036-8075
    ISSN (online) 1095-9203
    ISSN 0036-8075
    DOI 10.1126/science.adf5538
    Database MEDical Literature Analysis and Retrieval System OnLINE

    More links

    Kategorien

  2. Article ; Online: Hardware implementation of memristor-based artificial neural networks.

    Aguirre, Fernando / Sebastian, Abu / Le Gallo, Manuel / Song, Wenhao / Wang, Tong / Yang, J Joshua / Lu, Wei / Chang, Meng-Fan / Ielmini, Daniele / Yang, Yuchao / Mehonic, Adnan / Kenyon, Anthony / Villena, Marco A / Roldán, Juan B / Wu, Yuting / Hsu, Hung-Hsi / Raghavan, Nagarajan / Suñé, Jordi / Miranda, Enrique /
    Eltawil, Ahmed / Setti, Gianluca / Smagulova, Kamilya / Salama, Khaled N / Krestinskaya, Olga / Yan, Xiaobing / Ang, Kah-Wee / Jain, Samarth / Li, Sifan / Alharbi, Osamah / Pazos, Sebastian / Lanza, Mario

    Nature communications

    2024  Volume 15, Issue 1, Page(s) 1974

    Abstract: Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units operating in parallel. The low communication bandwidth between memory and processing units ... ...

    Abstract Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units operating in parallel. The low communication bandwidth between memory and processing units in conventional von Neumann machines does not support the requirements of emerging applications that rely extensively on large sets of data. More recent computing paradigms, such as high parallelization and near-memory computing, help alleviate the data communication bottleneck to some extent, but paradigm- shifting concepts are required. Memristors, a novel beyond-complementary metal-oxide-semiconductor (CMOS) technology, are a promising choice for memory devices due to their unique intrinsic device-level properties, enabling both storing and computing with a small, massively-parallel footprint at low power. Theoretically, this directly translates to a major boost in energy efficiency and computational throughput, but various practical challenges remain. In this work we review the latest efforts for achieving hardware-based memristive artificial neural networks (ANNs), describing with detail the working principia of each block and the different design alternatives with their own advantages and disadvantages, as well as the tools required for accurate estimation of performance metrics. Ultimately, we aim to provide a comprehensive protocol of the materials and methods involved in memristive neural networks to those aiming to start working in this field and the experts looking for a holistic approach.
    Language English
    Publishing date 2024-03-04
    Publishing country England
    Document type Journal Article ; Review
    ZDB-ID 2553671-0
    ISSN 2041-1723 ; 2041-1723
    ISSN (online) 2041-1723
    ISSN 2041-1723
    DOI 10.1038/s41467-024-45670-9
    Database MEDical Literature Analysis and Retrieval System OnLINE

    More links

    Kategorien

To top